Senior Digital Ic Verification Engineer (Uvm)

Job Description: BRAND NEW ROLE, BRAND NEW TEAM, BRAND NEW COMPANY COMING TO PORTUGAL FOR THE FIRST TIME!!! Exciting opportunity for a Senior Digital IC Verification Engineer, to work in the beautiful setting of Portugal - in either Porto or Lisbon. Our client is one of the world's growing Semiconductor companies, with HQ in the US and a 20-year background delivering performance solutions and ICs to a whole range of market areas including cloud computing, consumer, and automotive for some amazing companies & global brands! They are a billion dollar turnover company with enormous growth and development plans - so business is thriving for them! They are now seeking multiple Senior Digital IC Verification Engineers to help build a brand new team in their new design centre. Role: UVM and System Verilog Verification. Verification Metrics definition, Coverage analysis and debugging skills. Knowledge and experience on setting up an ASIC Verification environment, methodology and flow. Plan and Regressions. Digital Test Plan definition / creating / setting up test benches. Knowledge of analog / mixed signal (AMS) environments is a bonus. Knowledge of SOC verification is also a bonus. Relocation assistance will be provided to join this friendly team, and you can expect a competitive salary package, great bonus scheme, exciting long-term career prospects with very good opportunities for promotion. For details, please contact Rob Hudson. Visa sponsorship is also available if required. #J-18808-Ljbffr