Analog Design Engineer, SeniorSynopsys is the leading provider of high-quality, silicon-proven IP SerDes products, implemented on the most advanced CMOS technologies. We are looking for Analog Design Engineers to develop Synopsys' highest speed SerDes products, supporting Ethernet and PCIe standards.
You will be part of a fast growing analog and mixed signal R&D team, developing high-speed analog integrated circuits in the most advanced FinFET/GAA process nodes. You'll interact with a global, dynamic, multi-cultural and cross-functional design team.
Main Responsibilities:Responsible for the development of medium to large complexity analog circuitsCoordinate analog designers to develop and/or validate analog circuits considering electrical specifications and reliability constraintsDefine and plan analog design activities and associated milestonesPrepare and conduct design reviews, and follow-up on identified improvementsEvaluate the impact of parasitic effects related to layout implementations. Work with the layout team to minimize such effects, improving performance, power and area.Silicon correlation with simulation resultsAbout our work:SerDes are serial link transceiver products that perform high-speed chip-to-chip communications. They are key components in today's most widely adopted devices and systems, across a wide range of markets such as: Mobile, Automotive, Cloud Computing, High-Performance Computing (HPC), Artificial Intelligence (AI), Internet-of-Things (IoT), 5G, Storage. SerDes products can support multiple data rates and standards like USB, HDMI, MIPI, PCI Express (PCIe), Ethernet, etc.
Key QualificationsM.Sc. degree on Electrical Engineering with 5+ years of experience or Ph.D. in Electrical Engineering with 3+ years of experienceGood team playerGood analysis, problem-solving and organization skillsGood written and verbal communication in EnglishFamiliarity with one or more IC design packagesFamiliarity with UNIX operating SystemsPreferred ExperiencePrevious industry experience on CMOS analog design or specialization (e.g. Ph.D.) in a relevant area (ADC, DAC, PLL, Rx, Tx, References, etc.) are preferredExperience at coordinating junior engineersSystem level knowledge of SerDes system is a plus, but not mandatoryABOUT USAt Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market with reduced risk.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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