PHYSICAL DESIGN ENGINEER Portuguese Consultancy hires for hybrid work in Lisbon / Portugal Only resumes will be accepted from those who already live in Portugal FLUENT PORTUGUESE AND ENGLISH (B2) Please send only CV's in English Please don't forget to include in your resume all skills and experience that meet the requirements of the opportunity, as this significantly increases your success rate.
Your responsibilities will include: • Overseeing all aspects of Physical Design at either the full chip or block level, particularly in highly advanced technology nodes (10nm and below).
• Engaging deeply in floorplanning, partitioning/budgeting, power mesh distribution, clock tree planning and analysis, Scan re-ordering, placement, CTS, and place and route.
• Handling all relevant activities related to timing analysis, ensuring closure through sign-off, including SI/noise, and performing ECO tasks (both functional and timing).
• Leading validation/qualification tasks such as Formal Verification, EM/IR, DRC, LVS, Antenna, and ERC analysis and fixes.
• Contributing to the overall development and implementation of Low Power solutions.
• Developing/enhancing timing-related scripts for tasks like clock skew analysis, critical path analysis, various IO interfaces, and constraints partitioning/budgeting (from top-level to block level).
• Successfully completing multiple design cycles of high complexity with minimal supervision.
We're seeking candidates with: • 8+ years (preferred) of experience in challenging RTL2GDSII work conducted on 10nm or below nodes, with designs containing 500k – 1million+ instances.
• Proficiency in using PnR and timing analysis CAD tools from Synopsys and/or Cadence.
• Good understanding of synthesis flow , DFT scan/coverage, and optimization .
• Excellent skills in floorplan, power plan, CTS, place, route, and timing closure .
• Proficiency in Perl/TCL/Python scripting and Makefile .
• Expertise in timing STA/PTSI – signal integrity closure, and ECO generation/implementation .
• Strong capabilities in EM/IR, DRC, LVS, ERC analysis, and fixing .
• Experience with sign-off tape-out closure work.
• Any experience in top-level activities like floor planning, pin assignment, and tape-out is advantageous.
If you are looking for a new challenge and with great prospects for growth in your career, come join us.
Work Model: Hybrid #00263697