51792BR
PORTUGAL - Porto
Job Description and Requirements
Seeking a highly motivated and innovative ASIC Digital Design engineer with knowledge of ASIC Digital development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation USB/PCIe/DPHY/CDPHY/MPHY/DP/HDMI products.
The position offers an excellent opportunity to work with a skilled team of digital and mixed signal engineers delivering high-end mixed-signal designs from specification development to performing functional and performance tests on the test-chips.
The PHY development is very dynamic and provides an endless list of challenges. The candidate would have an initial training done by the top experts in the field as well as continuous on the job training. The work is challenging, given the constant technological changes, the ownership and the need to chart unknown waters.
Main duties might include:
Review SerDes standards and architecture documents to develop analog sub-block specifications
Identify and refine circuit implementations to achieve optimal power, area and performance targets
Propose design and verification strategies that efficiently use simulator features to ensure highest quality design
Participate in complex block and/or chip planning and architecture studies
Participate in the implementation of mixed-signal blocks using Verilog
Participate in the behavioral modeling activities using Verilog/SystemVerilog language
Continuous documentation and improvement of design and verification environments/plans and overall procedures
Development opportunities:
Be brave in the presence of the unknown
Develop systematic ways to address new problems, think outside of the box
Produce high quality work and products
Have an impact on the new product architectures, quality and development strategies
Write patents for any inventions
Key Qualifications:
A degree in engineering or applied science
Experience in producing high-quality technical documentation
3+ Years of experience of IC design flows and exposure to Verilog/VHDL
Good organizational and English communication skills
Willingness to learn new things and to work as part of a team
Preferred Qualifications:
Scripting and programming skills: Unix Shell, Python, Perl, TCL
Exposure to SystemVerilog, VMM, OVM or UVM
Knowledge of MIPI or similar protocols
At Synopsys, you're at the heart of the innovations that change the way the world works and plays. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. Smart medical devices. Your breakthroughs are ushering in the Era of Smart Everything. And you're powering it all with the world's most advanced technologies for chip design and software security. If you share the passion for innovation, we want to meet you.
Our silicon IP business is all about integrating more capabilities into a system on chip — faster. We offer the world's broadest portfolio of silicon IP — memories, data interfaces, security, and processors. Our products help our customers meet performance, power and size requirements of their applications. This allows differentiated products to reach the market quickly with reduced risk. Synopsys fosters an environment that treats people with respect, honesty, and professionalism. We're committed to partnering with the communities in which we work. Every year, Synopsys reaches out to local communities with resources to support education, science programs and other activities. Come and you can be part of a team that innovates and shapes the way the world moves on.
Inclusion and Diversity are core values at Synopsys. All applicants for employment will be considered.
Job Category
Engineering
Country
Portugal
Job Subcategory
ASIC Digital Design
Hire Type
Employee
#J-18808-Ljbffr
