Synopsys, a world leader in the Semiconductor IP industry, is seeking an Analog Modeling Engineer whose mandate is to: Work in a Digital and Verification Development team contributing to the development and validation of complex digital mixed signals for high-speed interface IP, with a major focus on Analog Schematics. Debug and verify the Analog schematics, supporting Analog teams to faster verify the functionality of Analog Schematics. Understand the IP from a System level, including Analog and Digital interactions. Engage in verification activities of analog Designs under the supervision of more experienced personnel, exercising judgment to determine appropriate actions to achieve the required specifications. Be able to debug and understand issues related to malfunctions in analog designs. Have exposure to mixed signal validation flows. Build productive working relationships with different teams across projects. Participate in applicable product/project reviews. Prepare and present reports outlining the outcome of technical projects. Key Qualifications University master's degree in electronic/Micro-electronics engineering. Knowledge of IC design flows. Analog design knowledge. Understanding of digital design. Understanding of digital verification tools. Willingness to learn new things. Good team-player. Organizational skills are essential. Good problem-solving skills. Good English communication skills. Preferred Experience 2+ years of relevant experience is highly preferred. Experience in producing high-quality technical documentation is desirable. Experience with analog tools, preferably Synopsys tools. Good understanding of analog design. Experience in Verilog/VHDL. Proficiency in at least one programming language such as Python, C, C++, or MATLAB. Experience in System Verilog / VMM / UVM. Exposure to Unix, Perl, and TCL scripting. At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things (IOT). These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Synopsys' leading DesignWare IP portfolio is developed by an IP Design Team within Synopsys' Solutions Group. Part of the Team is located in Lisbon and is staffed with analog and digital IC design engineers, application engineers, and test engineers among others. The company's extensive IP portfolio enables next-generation SoC designers to integrate silicon-proven functionality previously available only to large integrated device manufacturers. The IP is licensed to leading semiconductor companies across all major markets, offering high-precision, single-function blocks to complete interface sub-systems. #J-18808-Ljbffr
