Our team develops high-speed broadband communication systems with primary focus on SerDes physical interfaces (HDMI, USB, PCIe, MPHY). We are involved in all stages of product development, including definition of the system level architecture and algorithmic specification, performance optimization and functional Mixed Signal verification, as well as hands-on silicon validation. Grab this opportunity to make a real impact in leading edge technology solutions!
Main Responsibilities
Architecture and algorithmic specification
Mixed signal modeling and verification using System Verilog
Silicon test, correlation studies and validation
Key Qualifications
Requires an MSc or PhD in Electronics or Electrical and Computer Engineering
Familiar with CMOS analog and digital circuits, Filters
Familiar with digital IC design and verification using simulation tools such as VCS
Solid background in Electronics and Computer Architecture
Experience in C/Matlab/System Verilog modeling of circuits and systems.
Knowledgeable about script languages such as Python.
Nice to Have Experience
Background in Control and/or Communications theory is a plus – control loops and dynamics, equalization, coding, noise/crosstalk filtering
Experience in bare metal programming is a plus - Assembly/interaction with configuration registers
Knowledge of digital verification methodologies such as UVM
Knowledge of digital and mixed signal simulation and verification tools such as XA, SpyGlass and Formality
Knowledge of circuit topologies in high-speed Rx/Tx SerDes PHY.
Knowledge of high-speed analog CMOS circuit design and CDR architectures.
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
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